Staff CAD Engineer
Job Summary


The team members are RFIC system architect, RFIC design engineers, Physical Design engineers and Test engineers. It is quite small but focused on efficiency. The background of the team is various, some have been working for bigger companies, some for start-ups. The team is split between Milpitas CA and Chandler AZ. We value independent thinking and teamwork in a dynamic faced paced environment. We welcome diversity and multiculturalism, with team members from America, Asia and Europe.

Job Responsibilities:   

  • Optimization and automation of SoC design workflows
  • Develop, deploy, and support robust, configurable, and scalable tools to enable hardware verification across multiple projects
  • Work with the Design team on building new functionality that improves productivity and helps rapid debug
  • Work with the Chip leads on streamlining the tapeout process and assist the team in final verification of GDS delivery to the foundry
  • Work closely with EDA vendors to incorporate new capabilities of their commercial  tools, and to resolve issues

Required Skills & Experience: 

  • BS or MS in Computer Science, Computer Engineering, Electrical Engineering or related fields
  • Min 9 years of CAD related experience 
  • SoC RF Design Flow Optimization/Automation
  • EDA/CAD Systems (administration, support, vendor interface)
  • Foundry Process Technology Support
  • Workflow Customization, Optimization and Automation
  • Physical Design Flow Support
  • Post-Layout Analysis Support (parasitic, power, crosstalk, substrate)
  • Customer/Developer Interface
  • Common Design Environment
  • Configuration Management
  • QA Procedures and Standards
  • Knowledge of databases and query language is desired
 

Interpersonal skills: 

  • Strong work ethic
  • Organized, creative, motivated
  • Independent learner
  • Multitasker in a fast paced dynamic environment
  • Strong interpersonal skills
  • Concise and proactive communication skills within a multicultural environment

Position can be in Milpitas CA (Headquarters) or with our team in Phoenix AZ.

 

The salary range for this position is: $155,000 to $200,000

Compensation will be determined based on several factors including, but not limited to: skill set, years of experience and the employee’s geographic location.

Tarana provides competitive benefits to employees in this role including: Medical, dental, and vision benefits, 401K match, flexible time off, and stock options.      

 

Since our founding in 2009, we’ve been on a mission to accelerate the pace of bringing fast and affordable internet access — and all the benefits it provides — to the 90% of the world’s households who can’t get it. Through a decade of R&D and more than $400M of investment, we’ve created an entirely unique next-generation fixed wireless access technology, powering our first commercial platform, Gigabit 1 (G1). It delivers a game-changing advance in broadband economics in both mainstream and underserved markets, using either licensed or unlicensed spectrum. G1 started production in mid 2021 and has now been installed by over 160 service providers globally. We’re headquartered in Milpitas, California, with additional research and development in Pune, India.

G1 has been developed by an incredibly talented and pioneering core technical team. We are looking for more world-class problem solvers who can carry on our tradition of customer obsession and ground-breaking innovation. We’re well funded, growing incredibly quickly, maintaining a superb results-focused culture while we’re at it, and all grooving on the positive difference we are making for people all over the planet. If you want to help make a real difference in this world, apply now!

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Have you been involved in a design life cycle from: new technology setup -> EDA setup -> tool validation -> tapeout*
Give an example of frontend and backend automation flow that you have contributed in your past work.*
Give an example of a CAD utility you have help build that has proven helpful to the analog /RF team.*
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